Each of a complementary metal oxide semiconductor (CMOS) area image sensor and a metal oxide semiconductor (MOS) area image sensor (hereinafter, both referred to as the CMOS solid-state imaging device) and a charge coupled device (CCD) area image sensor (hereinafter, referred to as the CCD solid-state imaging device) generates an image signal by converting an input optical image into an electrical signal. These solid-state imaging devices are used as a functional element in various imaging apparatuses such as a digital still camera, a digital video camera, a network camera, and a mobile camera.
A conventional solid-state imaging device includes pixels arranged in a two-dimensional matrix and each having a photoelectric conversion unit (a photodiode) and a readout circuit unit, in a top surface of a semiconductor substrate. Accordingly, at a light-incoming surface, the area for the photoelectric conversion unit decreases by the area for the readout circuit unit. Thus, the conventional solid-state imaging device has a disadvantage that the aperture ratio decreases.
In order to solve this problem, Patent Literatures (PTL) 1 and 2 each discloses a layered solid-state imaging device having a photoelectric conversion unit including light absorbing materials stacked on a substrate and a readout circuit formed on the substrate.
For each of the pixels, the layered solid-state imaging device disclosed in these PTLs has the photoelectric conversion unit including a pixel electrode, a photoelectric conversion film stacked above the pixel electrode (on the light incoming side), and an opposite electrode formed on the upper surface of the photoelectric conversion film. The layered solid-state imaging device also brings out, from the photoelectric conversion unit via the pixel electrode, charges generated by the incident light, as a current signal. Usually, the layered solid-state imaging device has a charge blocking layer which conducts signal charges and blocks the opposite charges, to select positive or negative charges. This charge blocking layer is also formed opposite or on the pixel electrode.
FIG. 14 shows a schematic view of a circuit of a pixel unit (pixel) of a conventional layered solid-state imaging device which includes a photoelectric conversion film comprising an organic film, disclosed in PTL 1. The signal charges output from a photoelectric conversion unit 101 through a pixel electrode 102 are accumulated in a charge accumulation unit 103 which is a depletion layer capacity formed on the substrate. The charge accumulation unit 103 is connected to an input gate of a pixel readout transistor (amplifying transistor) 104 via a wire. A change in voltage caused by fluctuation in the amount of accumulated charges is detected by the readout transistor 104, and output, as a readout signal, to a vertical signal line 107 via a selection transistor 105 which selects timing to read out the pixel. Furthermore, a drain portion of the reset transistor 106 is connected to the charge accumulation unit 103 to reset the charges in the charge accumulation unit 103 after the signal charges are read out, and a charge accumulation unit voltage is set to an initial voltage upon resetting.